In data communications systems, a data transmitter transmits data which data can then be received and subsequently decoded by a data receiver. In order to decode the received data, the data receiver has to be synchronised to the received data. In systems where a single communications channel is available for data transmission, this is achieved by generating a clock signal in the data receiver which is synchronised to the received data.
A known technique for generating a clock signal substantially synchronised to received data, see for example the description beginning on page 414 of the book `Fondements de la theorie de la transmission de l'information` by Alexandru Spataru, utilises the fact that the data receiver has a pre-knowledge of the data rate of the received data. The data receiver detects edges of the received data and once an edge of the received data has been detected, the received data is sampled again after more than half a period of the received signal to determine whether the data is still at the same level. This enables the data receiver to decode the received data.
In general there may be ambiguity about the sense of the received data; this may be resolved by comparing part of the received data with a reference word previously stored in the receiver.
This technique does not require a precise sampling frequency and is therefore very quick to provide a clock signal. However, this known technique relies on the detection of edges in the received data, and thus such a technique has significant disadvantages when applied to systems in which noise can frequently distort the edges and hence corrupt the data. This can lead to errors in the data decoding by the data receiver.
Another known technique for generating a synchronised clock signal uses a Phase Locked Loop (PLL) in the data receiver. The data transmitter transmits a clock signal before transmitting data. The PLL locks the receiver oscillator to the transmitted clock signal so that once the PLL is locked, the PLL output signal is synchronised to the received data. This technique requires that the receiver oscillator has a frequency sufficiently close to the frequency of the transmitted clock signal so that the PLL can achieve lock in a reasonable amount of time. The parameters of the data receiver are set assuming that the PLL is locked after a predetermined time, at which time the data receiver can receive and decode the received data.
Although this technique provides an accurate clock signal for use in the data receiver which is not sensitive to noise, the time required to achieve lock can be too long for some applications, such as battery powered systems. These systems, in order to enhance battery life, require the data transmitter and data receiver to be switched on and off for very short periods of time.
For example, in remote controlled access systems for motor vehicles, the receiver is periodically switched off and on. In order to save vehicle's battery life, the time when the receiver is on is made as short as possible regarding the time needed to decode the locking/unlocking data received from a hand-held transmitter or remote unit carried by the vehicle operator. As soon as a coded signal is received in the period when the receiver is on, the clock signal generated in the clock generator of the receiver must be synchronised to the data received, in order to allow decoding of the data before the receiver is turned off again.
There is therefore a need for an improved clock generator and an improved method for generating a clock signal for use in a data receiver, which clock signal is substantially synchronised to the data received by the data receiver in which the above mentioned problems are mitigated.